Astera Labs
Emulation Engineering Intern
San Jose, CA +1 · Internship · Posted Sep 8, 2026
- Location
- San Jose, CA
California - Education
- Enrollment in a bachelor’s, master’s, or Ph.D. program in electrical engineering, computer engineering, computer science, or a related field.
About the job
Build and operate emulation environments and regression workflows for pre-silicon ASIC and system validation, including test execution, debugging, and performance improvements.
What you'll do
- Set up emulation environments and compile, package, and run RTL, firmware, and test components.
- Create reproducible tests and regressions; debug failures using logs, waveforms, and software-debug tools.
- Analyze emulator performance and resource use, improve testbench and infrastructure workflows, and document and present project results.
What they ask for
- Enrollment in a bachelor’s, master’s, or Ph.D. program in electrical engineering, computer engineering, computer science, or a related field.
- Coursework, research, or project experience in a relevant area such as digital design, computer architecture, embedded systems, verification, or software development.
- Programming or scripting experience in Python, C, C++, SystemVerilog, or a comparable language.
- Familiarity with Linux development environments, Git, command-line tools, debugging, and technical documentation.
Nice to have
- Experience with hardware emulation, FPGA prototyping, simulation, verification, regression testing, or testbench development.
- Familiarity with ZeBu, Palladium, QEMU, Verdi, OpenOCD, GDB, or comparable tools.
Pay
$35/hour to $55/hour (hourly rate); $500-per-week (housing/relocation stipend)
Tools
Python, C, C++, SystemVerilog, Linux, Git, Synopsys ZeBu, Palladium
Model-written summary · the original posting is authoritative