Astera Labs
Hardware Design Engineering, Senior Director - Signal Connectivity Rack-Scale Platforms
$220K–$280K
San Jose, California, United States +1 · Director · Full-time · Posted Jun 3, 2026
- Location
- San Jose, California, United States
California - Experience
- 18+ years of progressive hardware design engineering experience; 8+ years in engineering management/leadership.
- Education
- Bachelor's degree in Electrical Engineering, Computer Engineering, or related technical discipline.
About the job
Leads and scales the hardware design engineering organization, delivering Astera Labs connectivity products from concept through production while enabling OEM customers to integrate its silicon.
What you'll do
- Lead multidisciplinary hardware design, mechanical engineering, validation, lab infrastructure, and customer enablement teams; set organizational plans and develop engineering talent.
- Own hardware technology roadmaps and product development across cables, evaluation platforms, and rack-scale systems, including design reviews, validation, qualification, and production release.
- Lead OEM design reviews and technical support, and partner across engineering, manufacturing, product, and customer-facing teams.
What they ask for
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical discipline.
- 18+ years of progressive hardware design engineering experience in the specified product areas.
- 8+ years in engineering management or leadership, including managing managers and building multi-team organizations.
- Deep expertise in high-speed PCB/substrate design, signal integrity, power delivery, and mixed-signal circuit design at 56G/112G PAM4 data rates or above.
Nice to have
- Master's or Ph.D. in Electrical Engineering focused on high-speed interconnects, electromagnetic design, or mixed-signal systems.
- Experience with 224G/lane interconnect technology, rack-scale products, or OEM design enablement.
Pay
USD $220,000 to $280,000 base salary
Tools
112G and 224G PAM4, Cadence Allegro/OrCAD, Ansys HFSS/SIwave, Keysight ADS, SolidWorks/Creo, CMIS, IEEE 802.3ck/dj, OIF CEI-112G/224G
Model-written summary · the original posting is authoritative