Astera Labs
Principal Digital Design Engineer
$185K–$240K
San Jose, California, United States +1 · Principal · Full-time · Posted Oct 14, 2026
- Location
- San Jose, California, United States
California - Experience
- +8 years supporting or developing complex SoC/silicon products for Switch ASIC, Networking applications and/or Server, Storage.
- Education
- Bachelor’s degree in EE required; Master’s degree preferred.
- Visa sponsorship
- Authorized to work in the US.
About the job
Develops front-end circuit design and implementation for high-performance network controllers, from microarchitecture and RTL through integration, verification, and production.
What you'll do
- Develop microarchitecture and front-end circuit design, including RTL, synthesis, IP integration, and block-level verification.
- Own full-chip or block-level designs from architecture to GDS and drive complex designs to production.
- Support silicon bring-up and debug.
What they ask for
- Bachelor’s degree in EE.
- Hands-on knowledge of high-speed protocols, including PCIe, Ualink, Esun, or Ethernet.
- Front-end design expertise, including architecture, RTL, simulation, synthesis, timing closure, GLS, and DFT; knowledge of scan test insertion and UVM-based verification.
- Authorized to work in the US and start immediately.
Nice to have
- Master’s degree.
- Firmware development with C, scripting with Python or equivalent languages, or development/support for PCIe or Ethernet Switch products.
Pay
$185,000.00 USD – $240,000.00 USD base salary
Tools
PCIe, Ualink, Esun, Ethernet, Synopsys, Cadence, UVM, CMOS
Model-written summary · the original posting is authoritative