Astera Labs
Principal Post-Silicon Validation Engineer
$207K–$230K
San Jose, California, United States +1 · Principal · Full-time · Posted Oct 20, 2026
- Location
- San Jose, California, United States
California - Experience
- 8–12 years in post-silicon validation, silicon bring-up, or hardware characterization.
- Education
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.
About the job
Leads post-silicon validation of high-speed connectivity silicon from first-silicon bring-up through characterization and production release.
What you'll do
- Define and lead validation plans, test strategies, coverage goals, and exit criteria.
- Bring up and characterize silicon in the lab; debug hardware, firmware, and system-level issues to root cause.
- Develop validation automation and lab infrastructure, analyze test data, and mentor engineers.
What they ask for
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.
- Hands-on experience with high-speed serial interfaces such as PCIe and a strong understanding of the physical layer.
- Proficiency with oscilloscopes, BERTs, protocol analyzers, and power supplies.
- Strong Python and/or C/C++ programming skills for test automation, and ability to debug hardware and firmware issues to root cause.
Nice to have
- Master's degree or PhD in a related field.
- Experience with PCIe Gen 5 or Gen 6, Ethernet, retimers, SerDes characterization, equalization tuning, link margining, or taking products from first silicon to volume production.
Pay
$207,000 to $230,000 USD base salary
Tools
Python, C/C++, PCIe, Ethernet, oscilloscopes, BERTs, protocol analyzers
Model-written summary · the original posting is authoritative