Astranis
FPGA Associate (Summer 2027)
San Francisco +1 · Full-time · Posted Sep 23, 2026
- Location
- San Francisco
San Francisco, California, United States - Education
- B.S. or M.S. in electrical engineering, computer science, computer engineering, or equivalent.
- Visa sponsorship
- Must be a U.S. citizen, lawful permanent resident of the United States, or other protected individual as defined by 8 U.S.C. 1324b(a)(3).
About the job
Develop and test FPGA RTL and supporting software for satellite hardware in a 12-week summer associate role.
What you'll do
- Develop RTL for FPGA-targeted applications and work with multiple FPGAs and toolchains.
- Interface FPGAs with peripherals such as high-speed data converters, memories, and MCUs; write software to interface with and test RTL in hardware.
- Collaborate with electrical and software engineers.
What they ask for
- B.S. or M.S. in electrical engineering, computer science, computer engineering, or equivalent.
- Experience designing, implementing, and testing high-throughput systems on FPGAs.
- Proficiency with Verilog/SystemVerilog for synthesis.
- Passion for hands-on hardware development and working in a fast-paced environment.
Nice to have
- Experience with UVM and advanced SystemVerilog verification.
- Experience with Xilinx FPGAs, Vivado IDE, or TCL.
Pay
$1,925 per week USD base salary
Tools
FPGA, Verilog, SystemVerilog, UVM, Xilinx FPGAs, Vivado IDE, TCL, JESD204B
Model-written summary · the original posting is authoritative