Astranis
FPGA Intern (Winter 2027)
San Francisco +1 · Internship · Posted Sep 23, 2026
- Location
- San Francisco
San Francisco, California, United States - Education
- Currently pursuing a B.S. or M.S. in electrical engineering, computer science, computer engineering, or equivalent.
- Visa sponsorship
- Requires U.S. citizenship, lawful permanent residency, or qualifying protected-individual status; the posting also specifies US Citizenship or Green Card as a legal requirement.
About the job
Develop and test FPGA RTL and supporting software, interfacing FPGAs with peripherals and collaborating with electrical and software engineers.
What you'll do
- Develop RTL for FPGA-targeted applications and work with multiple FPGAs and toolchains.
- Interface FPGAs with peripherals such as high-speed data converters, memories, and MCUs.
- Write software to test RTL in hardware and collaborate with electrical and software engineers.
What they ask for
- Currently pursuing a B.S. or M.S. in electrical engineering, computer science, computer engineering, or equivalent.
- Experience designing, implementing, and testing high-throughput systems on FPGAs.
- Proficiency with Verilog/SystemVerilog for synthesis.
- U.S. citizenship, lawful permanent residency, or qualifying protected-individual status.
Nice to have
- Experience with UVM and advanced SystemVerilog verification.
- Experience with Xilinx FPGAs, Vivado IDE, or TCL.
Pay
$29.00 per hour USD (base pay); $29 — $29 USD (base hourly pay)
Tools
Verilog, SystemVerilog, UVM, Xilinx FPGAs, Vivado IDE, TCL, MCUs, JESD204B
Model-written summary · the original posting is authoritative