Baidu USA
CPU Design Architect / Principal Digital Design Engineer
Sunnyvale, CA +1 · Principal · Full-time · Posted Aug 22, 2022
- Location
- Sunnyvale, CA
Sunnyvale, CA, United States - Experience
- At least 5 years; 8+ years preferred.
- Education
- Master’s degree in Electrical Engineering, Computer Science, or Computer Engineering.
About the job
Design and integrate a high-performance, low-power, small-area MIPS CPU subsystem for a cellular modem, including architecture research and development of CPU performance features.
What you'll do
- Develop and integrate the MIPS CPU subsystem.
- Research new CPU architecture directions and identify performance bottlenecks through workload analysis.
- Derive and model CPU architecture and microarchitecture trade-offs, contributing ideas through to silicon.
What they ask for
- Master’s degree in Electrical Engineering, Computer Science, or Computer Engineering.
- At least 5 years of CPU-related architecture, RTL, verification, or implementation design experience.
- Knowledge and practical experience with common RISC CPU architecture.
- Familiarity with chip digital design flow, including RTL integration, simulation, and STA.
Nice to have
- PhD in a relevant field; 8+ years of CPU-related design experience.
- Experience with SMP and snoop-based multiprocessor architecture, synthesis, power analysis, or post-silicon debugging.
Tools
MIPS, RISC, RTL, STA, SMP, FPGA, DVT, SLT
Model-written summary · the original posting is authoritative