Baidu USA
Senior RTL Design Engineer
Sunnyvale, CA +1 · Senior · Full-time · Posted Aug 22, 2022
- Location
- Sunnyvale, CA
Sunnyvale, CA, United States - Experience
- 8+ years of recent industry experience.
- Education
- MS/ PhD degree in EE, CE, CS or a related technical discipline, or equivalent experience.
About the job
Architects and implements RISC-V CPU core generator features and improvements, then collaborates on verification, physical implementation, and performance optimization.
What you'll do
- Develop CPU microarchitecture specifications and document designs.
- Perform initial verification and work with verification teams on test plans.
- Collaborate with physical implementation and performance modelling teams to meet design goals.
What they ask for
- 8+ years of recent industry experience in high-performance, energy-efficient CPU designs.
- Expertise in at least one listed CPU design area, such as instruction fetch and decode, branch prediction, execution units, or memory subsystems.
- Proficiency in RTL design with Verilog, System Verilog, or VHDL; knowledge of at least one object-oriented and/or functional programming language.
- Successful CPU development experience from architecture through tapeout.
Nice to have
- Knowledge of RISC-V architecture.
- Experience with Scala and/or Chisel.
Tools
RISC-V, Verilog, System Verilog, VHDL, Scala, Chisel
Model-written summary · the original posting is authoritative