Broadcom
ASIC Verification Engineer
USA-CA Irvine Alton Parkway Bldg 2 · Full-time · Posted Aug 28, 2026
- Experience
- New Grad MSEE/CS, or BSEE/CS with 3+ years of direct ASIC Design/Verification experience.
- Education
- MSEE/CS (New Grad) or BSEE/CS.
About the job
Verifies high-speed communication ASICs across block and chip levels, from design concept through production.
What you'll do
- Develop and maintain SystemVerilog UVM verification environments and testbench components.
- Verify designs at block and chip levels and develop scripts and tools to improve verification efficiency and design quality.
- Work with architecture, design, and firmware teams; develop understanding of IEEE Ethernet protocols.
What they ask for
- MSEE/CS as a new graduate, or BSEE/CS with 3+ years of direct ASIC Design/Verification experience.
- Strong grasp of logic design, computer architecture, and networking protocols.
- Proficiency in SystemVerilog, Verilog, or VHDL.
Nice to have
- Strong C/C++ skills and understanding of Object-Oriented Programming (OOP).
- Scripting experience with Python, Perl, or TCL.
Tools
SystemVerilog UVM, SystemVerilog, Verilog, VHDL, C/C++, Python, Perl, TCL
AI focus
The team designs PHYs for AI and data center applications; the role verifies communication ASICs, with no specific AI development duties stated.
Model-written summary · the original posting is authoritative