Broadcom
ASIC Verification Engineer
$101K–$162K
USA-CA Irvine Alton Parkway Bldg 2 +1 · Full-time · Posted Aug 26, 2026
- Location
- USA-CA Irvine Alton Parkway Bldg 2
USA-CA San Jose Innovation Drive - Experience
- 5+ years of related experience with a Bachelor’s, or recent graduate with a Master’s or PhD.
- Education
- Bachelor’s in Engineering, or a recent graduate with a Master’s or PhD in Engineering.
About the job
Verify communication ASICs for high-speed interconnect products throughout the product development cycle, from definition to production.
What you'll do
- Develop understanding of IEEE Ethernet protocols, chip architecture, microarchitecture, and design specifications.
- Build SystemVerilog UVM verification environments and testbench components, and perform block- and chip-level verification.
- Develop scripts and tools to improve engineering efficiency and quality.
What they ask for
- Bachelor’s in Engineering with 5+ years of related experience, or a recent graduate with a Master’s or PhD in Engineering.
- Design/verification experience, or equivalent experience.
- Coursework in logic design and electronic circuit design, with a background in ASIC design and verification.
- Proficiency in an HDL such as Verilog, SystemVerilog, or VHDL.
Nice to have
- C/C++ proficiency and hands-on exposure to object-oriented programming.
- Scripting proficiency in languages such as Python, PERL, or TCL.
Pay
USD 101,000.00 To USD 162,000.00 (base salary)
Tools
SystemVerilog UVM, Verilog, SystemVerilog, VHDL, C/C++, Python, PERL, TCL
Model-written summary · the original posting is authoritative