Broadcom
Design Verification Engineer
USA-CA San Jose Innovation Drive · Full-time · Posted Oct 22, 2026
- Experience
- 12+ years of relevant industry work experience.
- Education
- Bachelor’s Degree in Electrical and Electronic Engineering, Computer Science, or equivalent.
- Visa sponsorship
- Must have legal authorization to work in the US.
About the job
Develop and verify SoC and IP designs at the system and block levels using simulation, coverage, assertions, and debugging.
What you'll do
- Develop verification environments and components, including UVM agents and behavioral models.
- Create directed and random tests, coverage, and assertions from design specifications.
- Debug simulation failures and analyze coverage results.
What they ask for
- Bachelor’s Degree in Electrical and Electronic Engineering, Computer Science, or equivalent.
- Experience verifying designs at system and block levels.
- Fluent knowledge of RTL verification methodologies, including System Verilog; strong experience in ASIC design verification flows and methodologies.
- Strong working knowledge of OVM, UVM, C/C++, Perl, and scripting; must have legal authorization to work in the US.
Nice to have
- Experience with hardware design and debug, C++/SystemC, emulators, or FPGA-based prototyping.
- Familiarity with chip design methodologies and tools; knowledge of CPU, DDR, Bus Protocol, Network Protocol, or DSP design.
Tools
System Verilog, UVM, OVM, C/C++, Perl, C++/SystemC
Model-written summary · the original posting is authoritative