Broadcom
I/O Design Engineer
$110K–$176K
USA-AZ-Chandler-North Juniper Drive · Full-time · Posted Aug 11, 2026
- Experience
- 6+ years of I/O or analog circuit design experience.
- Education
- MS or PhD in Electrical Engineering.
About the job
Design and verify analog and mixed-signal I/O circuits and IP, supporting integration and silicon bring-up for advanced-node products, including AI programs.
What you'll do
- Design CMOS I/O and analog circuits, and simulate AC/DC performance, signal integrity, jitter, and power.
- Perform transistor reliability and EMIR analysis; coordinate physical design and verification with layout teams.
- Build Verilog, Synopsys Liberty, and IBIS models; document designs and support chip integration and silicon bring-up.
What they ask for
- MS or PhD in Electrical Engineering.
- 6+ years of I/O or analog circuit design experience.
- Deep proficiency in Cadence Virtuoso Schematic/Layout capture and SPICE/Spectre circuit simulation.
- Solid foundation in GPIO, I2C, I3C, eMMC, RGMII, and SPMI protocols.
Nice to have
- Familiarity with ESD, Latch-up, EMI, and Signal Integrity.
- Experience with advanced CMOS FinFET and GAA process nodes, including technology limitations and PPA tradeoffs.
Pay
USD 109,700.00 to USD 175,500.00 annual base salary
Tools
Cadence Virtuoso, SPICE, Spectre, GPIO, I2C, I3C, eMMC, RGMII
AI focus
Contribute to I/O and IP design for leading-edge AI programs on advanced nodes.
Model-written summary · the original posting is authoritative