Broadcom
IC Verification Engineer
$122K–$195K
USA-California-San Jose-1320 Ridder Park Drive · Full-time · Posted Sep 21, 2026
- Experience
- 8+ years with a bachelor’s degree, or 6+ years with a master’s degree; also requires 6+ years writing and debugging complex test benches.
- Education
- Bachelor’s or master’s degree in Electrical Engineering or a related degree.
About the job
Develops and improves verification plans, test benches, tests, and functional coverage for block, core, and SoC designs.
What you'll do
- Develop feature test plans, functional coverage, and scalable, reusable test benches; build pseudo-random tests.
- Debug regression failures, analyze coverage gaps, and improve tests and verification quality and efficiency.
- Lead verification strategy documentation and reviews with design and architecture teams.
What they ask for
- Bachelor’s degree in Electrical Engineering or related field and 8+ years of relevant experience, or master’s degree in Electrical Engineering or related field and 6+ years of related experience.
- 6+ years of experience writing and debugging complex test benches.
- Deep understanding of verification, including test benches, test plans, pseudo-random tests, and functional coverage.
- Proficiency in System Verilog and verification methodologies such as UVM/VMM/OVM; strong command of object-oriented programming principles.
Nice to have
- Understanding of a complex protocol such as PCIe or another multi-layered protocol.
- Knowledge of PCI Express protocol.
Pay
USD 121,900.00 To USD 195,000.00 (base salary)
Tools
System Verilog, UVM, VMM, OVM, PCIe, PCI Express
Model-written summary · the original posting is authoritative