Infrastructure AI/ML Engineer for Memory Design, Characterization, and Yield Optimization

What you'll do

• Architect, deploy, and scale distributed multi-agent AI workflows for memory development.
• Integrate LLM-driven agent pipelines with EDA suites, in-house tools, and enterprise data; develop AI-driven scan-failure classification and predictive yield models.
• Collaborate with memory, DFT, EDA, and infrastructure teams to convert hardware engineering methods into modular agentic workflows.

What they ask for

• Experience designing and characterizing embedded memory in advanced technology process nodes and in compute-in-memory design and architecture.
• Experience architecting production-grade LLM applications, including multi-agent orchestration, function-calling/tool-use, RAG, and agent integration with enterprise tools and knowledge sources.
• Deep experience with LangGraph; proficiency in Python and TCL; expertise in microservices, REST APIs, Docker, Kubernetes, and workflow orchestration.
• Hands-on familiarity with EDA tooling from Synopsys, Cadence, and Siemens EDA, plus System Verilog and UVM environments.

Pay

USD 150,800.00 to USD 241,200.00 annual base salary

Tools

LLM, RAG, MCP, LangGraph, Synopsys, Cadence, Siemens EDA, Python

AI focus

Builds multi-agent LLM workflows for memory design and development, automates scan-failure classification, and predicts yield excursions using semiconductor process and test data.