Drimva

ByteDance

ASIC Design Engineer Intern (Video Silicon IP) - 2027 Summer

San Jose, California · Internship · Posted Oct 28, 2026

Education
Currently pursuing a Master's in computer science/electrical engineering or a related technical discipline.

About the job

Design ASIC hardware accelerators and high-performance, low-power video processing IP for compressing and processing still images and videos.

What you'll do

  • Work with architecture, algorithm, and verification teams to build video processing IP.
  • Apply computer architecture and ASIC design knowledge to develop ASIC designs for image and video compression and processing.

What they ask for

  • Currently pursuing a Master's in computer science, electrical engineering, or a related technical discipline.
  • Knowledge of Video Codecs.
  • Experience with RTL design (SystemVerilog) or High level Synthesis (HLS).
  • Experience with UVM methodology, SystemC, or DPI; good Python programming skills for task automation.

Tools

SystemVerilog, High level Synthesis (HLS), UVM, SystemC, DPI, Python

Model-written summary · the original posting is authoritative

First seen Oct 28, 2026 · Last verified Nov 6, 2026 (UTC)