Drimva

Cerebras

Senior Product, Test and Yield Enhancement Engineer - Taiwan

Sunnyvale, CA · Hybrid · Senior · Full-time · Posted Sep 30, 2026

Experience
10+ years; no alternatives stated.
Education
BS or MS in Electrical Engineering, Computer Engineering, or a related field.

About the job

Develops and drives production test strategy, failure analysis, and yield improvement for Cerebras wafer-scale AI processors in Taiwan.

What you'll do

  • Develop and optimize production-test programs, DFT strategies, and wafer-level test flows.
  • Analyze manufacturing, ATE, Shmoo, parametric, and defect data; develop failure-isolation methods and improve yield.
  • Partner with foundries, OSATs, and cross-functional teams; support high-volume manufacturing and wafer/lot disposition.

What they ask for

  • BS or MS in Electrical Engineering, Computer Engineering, or a related field.
  • 10+ years of semiconductor product or test-engineering experience supporting highly integrated devices.
  • Strong experience in test development, silicon debug, test optimization, and yield improvement; experience testing large parallel processors or networking ASICs with SRAM, DDR/DRAM, or HBM.
  • Expert-level hands-on experience with Advantest V93000; experience developing and debugging load boards and probe cards; experience with Git-based development and release flows.

Nice to have

  • Teradyne experience; programming with C, C++, Python, or Perl.
  • Experience with Tessent, OBIRCH, IREM, or LADA; high-speed SerDes testing; or applying data analysis or machine learning to yield optimization.

Tools

Advantest V93000, Teradyne, Git, C, C++, Python, Perl, Tessent

AI focus

Applies test engineering and yield-enhancement methods to wafer-scale AI processors; advanced data-analysis or machine-learning techniques for yield optimization are preferred.

Model-written summary · the original posting is authoritative

First seen Oct 10, 2026 · Last verified Nov 6, 2026 (UTC)