Cerebras
Senior Staff Design Verification Engineer
$250K–$300K
Sunnyvale, CA · On-site · Senior Staff · Full-time · Posted Aug 7, 2026
- Experience
- 15+ years of Design Verification experience; desired qualifications also state 15+ years of hands-on Design Verification experience.
About the job
Develop and lead design verification strategies, testbenches, regressions, and debugging for Cerebras chip designs across simulation, emulation, and silicon bring-up.
What you'll do
- Develop verification strategies, detailed tests, coverage plans, and reusable verification environments.
- Implement tests, manage regressions, collect coverage, and debug failures across verification and bring-up phases.
- Collaborate across architecture, design, software, and validation teams to improve verification flows and methodology.
What they ask for
- Deep knowledge of SystemVerilog testbench, DPI, and UVM.
- Excellent programming skills and knowledge of software engineering practices, including object-oriented design.
- Experience developing scalable and portable testbenches and components; experience with verification methodologies and tools.
- Proficiency in scripting languages such as Python or Perl.
Nice to have
- Knowledge of pipelined processor architecture.
- BS or MS in Computer Science or Electrical Engineering.
Pay
$250,000 to $300,000 annually (base salary)
Tools
SystemVerilog, DPI, UVM, Python, Perl
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