Cerebras
Staff Design Verification Engineer
$225K–$270K
Sunnyvale, CA · On-site · Staff · Full-time · Posted Aug 12, 2026
- Experience
- 10+ years of Design Verification experience; desired qualifications also state 10+ years of hands-on Design Verification experience.
- Education
- Preferred: BS or MS in Computer Science or Electrical Engineering.
About the job
Develop and lead design verification strategies, tests, and reusable infrastructure to validate chip designs across simulation, emulation, and silicon bring-up.
What you'll do
- Create verification strategies, test plans, reusable environments, tests, and coverage based on micro-architecture.
- Manage regressions, collect coverage, and debug failures and complex issues across simulation, emulation, and silicon bring-up.
- Collaborate with architecture, RTL design, physical design, firmware, validation, and other teams to improve verification flows and practices.
What they ask for
- Deep knowledge of SystemVerilog testbench, DPI, and UVM.
- Excellent programming skills and knowledge of software engineering practices, including object-oriented design.
- Experience developing scalable and portable testbenches and components; experience with verification methodologies and tools.
- Proficiency in scripting languages such as Python or Perl.
Nice to have
- Knowledge of pipelined processor architecture.
- BS or MS in Computer Science or Electrical Engineering.
Pay
$225,000 to $270,000 annually (base salary)
Tools
SystemVerilog, DPI, UVM, Python, Perl
Model-written summary · the original posting is authoritative