Drimva

CesiumAstro

Senior Electrical Engineer

$133K–$161K

Westminster, CO · On-site · Senior · Full-time · Posted Aug 30, 2026

Experience
Minimum of 5 years of relevant experience in board-level electronics design, analysis, and test.
Education
Bachelor of Science (BS) degree or higher in Electrical Engineering from an accredited university.
Visa sponsorship
Applicant must be a U.S. citizen, lawful permanent resident of the U.S., conditional resident, asylee or refugee (protected individuals as defined by 8 U.S.C. 1324b(a)(3)), or eligible to obtain the required authorizations from the U.S. Department of State.

About the job

Leads the full lifecycle design, implementation, testing, and production delivery of board-level digital and mixed-signal electronics for advanced RF communication systems.

What you'll do

  • Own board-level electronics design, from trade studies and component selection through implementation and deployment.
  • Lead design reviews and technical decisions; mentor junior engineers and communicate technical concepts.
  • Bring up, verify, debug, and analyze hardware using lab testing and signal- or power-integrity tools.

What they ask for

  • BS or higher in Electrical Engineering from an accredited university.
  • At least 5 years of relevant board-level electronics design, analysis, and test experience.
  • Expertise in digital and mixed-signal electronics, PCB layout, high-speed routing, and HDI stackup design.
  • Experience delivering complex board-level hardware through production and deployment, including lab bring-up and verification.

Nice to have

  • Aerospace design experience; familiarity with EMI/EMC mitigation, Military and/or DO specifications, or design qualification.
  • Experience leading small hardware teams developing multi-module assemblies.

Pay

USD 133,000–161,000 per-year-salary (base salary)

Tools

FPGAs, ADCs/DACs, Ansys SIwave, ADS SIPro, Mentor Hyperlynx

Model-written summary · the original posting is authoritative

First seen Oct 29, 2026 · Last verified Nov 5, 2026 (UTC)