CesiumAstro
Staff FPGA Verification Engineer
Austin, TX · On-site · Staff · Full-time · Posted Aug 31, 2026
- Experience
- 8 years of industry or university research experience in FPGA systems design, analysis, and implementation at the HDL level.
- Education
- Bachelor of Science (BS) or Master of Science (MS) in Electrical Engineering or Computer Engineering from an accredited university or institution.
- Visa sponsorship
- Applicant must be a U.S. citizen, lawful permanent resident, conditional resident, asylee or refugee (protected individual as defined by 8 U.S.C. 1324b(a)(3)), or eligible to obtain required authorizations from the U.S. Department of State.
About the job
Provides technical leadership for verifying FPGA-based hardware, improving product performance, reliability, and mission success.
What you'll do
- Lead FPGA verification, debugging, qualification, and failure analysis; investigate root causes and implement engineering changes.
- Develop verification plans and review packages, assess simulation results and risks, and identify improvements to FPGA methods and products.
- Provide FPGA engineering guidance in customer and design reviews, hardware integration, and product development.
What they ask for
- BS or MS in Electrical Engineering or Computer Engineering from an accredited university or institution.
- 8 years of industry or university research experience designing, analyzing, and implementing FPGA systems at the HDL level.
- Knowledge of digital logic design, FPGA architecture, HDL, and digital systems; proficiency developing FPGA verification environments and understanding verification methodologies, timing closure, embedded systems, and high-speed interfaces.
- Working knowledge of UVM Framework (UVMF), including reusable testbenches, verification components, and automated test environments.
Nice to have
- Experience with worst-case, failure mode and criticality, and reliability analyses; familiarity with digital communications and digital signal processing.
- Experience with board-level hardware design, distributed teams, git source code control, or firmware development using agile flows.
Tools
HDL, UVM Framework (UVMF), Vivado, Quartus Prime, ModelSim, QuestaSim, MATLAB, Git
Model-written summary · the original posting is authoritative