Cisco
ASIC DFT Technical Leader - CDC
$166K–$308K
San Jose, California, US +2 · Hybrid · Full-time · Posted Oct 13, 2026
- Location
- San Jose, California, US
Austin, Texas, US
Seattle, Washington, US - Experience
- Bachelor’s with 8+ years of related experience, master’s with 6+ years, or PhD with 3 years.
- Education
- Bachelor’s, master’s, or PhD; no equivalent-experience alternative stated.
About the job
Defines, designs, and verifies ASICs and ASIC subsystems, including CDC/RDC design and sign-off, for Cisco platforms.
What you'll do
- Design, document, and develop ASIC subsystems for high-volume, high-quality release.
- Contribute to meeting product power, performance, and area goals.
- Help define processes, methods, and tools for complex design and implementation.
What they ask for
- RTL development experience.
- Experience with CDC/RDC concepts and design implementation.
- Experience maintaining CDC/RDC flows and signing off constraints and waivers.
- Experience with static glitch hazards and analysis of synthesis-optimized gate netlists.
Nice to have
- Experience developing SDC constraints.
- Experience with VCS simulation SVA (SystemVerilog Assertions).
Pay
$186,900.00 to $267,700.00 USD base salary; $186,900.00 - $307,800.00 USD base salary; $166,300.00 - $274,100.00 USD base salary
Tools
ASIC, RTL, CDC/RDC, SDC, VCS, SVA (SystemVerilog Assertions)
Model-written summary · the original posting is authoritative