Cisco
ASIC Digital Design Tech Lead
$166K–$308K
Carlsbad, California, US +1 · Hybrid · Full-time · Posted Oct 23, 2026
- Location
- Carlsbad, California, US
Allentown, Pennsylvania, US - Experience
- Bachelor’s + 8 years, or Master’s + 6 years, or PhD + 3 years of related experience.
- Education
- Bachelor’s, Master’s, or PhD.
About the job
Leads digital architecture and the full ASIC lifecycle for Silicon One optical interconnects, integrating high-speed IP and optimizing power and performance through tapeout and production.
What you'll do
- Define digital architectures and lead ASIC/SoC design from concept through tapeout and post-silicon production.
- Integrate high-speed IP, including ODSP, D2D IP, and SerDes XSR/PAM4.
- Lead cross-functional engineering teams and optimize power and performance for 100G, 200G, and 400G silicon photonics and Co-Packaged Optics.
What they ask for
- Digital design experience with FSMs, CPU subsystems, complex SoCs, and FPGA validation.
- Experience managing the complete ASIC/SoC design flow.
- Experience with bus and interface protocols such as SPI, I2C, APB, and AXI.
- Experience with high-speed SerDes, Ethernet, and D2D PHY IP.
Nice to have
- Experience leading complex digital block and CPU-subsystem design across pre-silicon through post-silicon validation and bring-up.
- Experience with specifications, verification, IP integration, backend implementation, automation, and cross-functional technical leadership.
Pay
$166,300.00 to $238,300.00 USD base salary; $186,900.00 - $307,800.00 USD base salary; $166,300.00 - $274,100.00 USD base salary
Tools
FSMs, CPU subsystems, SoCs, FPGA, SPI, I2C, APB, AXI
AI focus
Designs optical interconnect silicon platforms described as powering the AI era; the role’s stated work includes high-speed IP integration and optimization for silicon photonics and Co-Packaged Optics.
Model-written summary · the original posting is authoritative