Cisco
ASIC Engineer- CAD
$138K–$256K
San Jose, California, US · Onsite Only · Full-time · Posted Sep 13, 2026
- Experience
- 5+ years of ASIC Design experience with a Bachelor's degree; 3+ years with a Master's degree; or 0 years with a PhD.
- Education
- Bachelor’s degree in Electrical or Computer Engineering, or Master’s degree in Electrical or Computer Engineering, or PhD.
About the job
Develop and maintain DFT CAD infrastructure, automation, and implementation flows for ASIC design, including debugging, regressions, and tool qualification.
What you'll do
- Build and improve DFT automation, implementation flows, regression frameworks, and dashboards.
- Debug flow failures, improve robustness and scalability, and support large-scale regressions on compute farms.
- Document and support releases and tool qualification; collaborate with design, verification, test, physical design, and CAD teams.
What they ask for
- Experience with Verilog/SystemVerilog programming and interactive and waveform debugging.
- Experience with industry-standard DFT/EDA tools and resolving flow and methodology issues with cross-functional teams.
- Scripting experience in Python, Perl, TCL, or shell programming.
Nice to have
- Experience with Synopsys Design Constraints (SDC).
Pay
$155,000.00 to $222,600.00 USD base salary; $155,000.00 - $256,000.00 USD base salary; $138,100.00 - $227,900.00 USD base salary
Tools
Verilog, SystemVerilog, Python, Perl, Tcl, Shell, LSF, Synopsys Design Constraints (SDC)
Model-written summary · the original posting is authoritative