Drimva

Cisco

ASIC Failure Analysis Engineer (Onsite)

$138K–$256K

San Jose, California, US · Onsite Only · Full-time · Posted Oct 30, 2026

Experience
5+ years in semiconductor failure analysis.
Education
Bachelor's degree in Electrical/Electronics Engineering or related field; master's degree preferred.

About the job

Conducts ASIC silicon failure analysis, identifies root causes of reliability and field failures, and guides corrective actions and fault isolation with engineering teams and vendors.

What you'll do

  • Perform root-cause analysis of silicon reliability-test and field failures, and propose corrective actions.
  • Develop and implement failure-analysis processes; coordinate analysis logistics and document and report results.
  • Work with product, test, design, quality, assembly, and foundry teams to isolate and characterize faults, and serve as a technical resource.

What they ask for

  • Bachelor's degree in Electrical/Electronics Engineering or related field.
  • 5+ years of experience in semiconductor failure analysis.
  • Experience writing and executing FA plans and interpreting results from techniques including cross section, X-ray, CSAM, TDR, FIB, SEM, TEM, IR/EMMI/OBIRCH.
  • Ability to specify hardware and implement dynamic FA setup using SIL (Solid Immersion Lens) and LSM (Laser Scanning Microscopy); experience with ATE, Scan/ATPG, and MBIST fault isolation.

Nice to have

  • Master's degree.
  • Semiconductor process knowledge, ATE docked dynamic fault-isolation techniques, JEDEC IC Qualification knowledge, or experience driving physical failure analysis with suppliers.

Pay

$155,000.00 to $222,600.00 USD base salary; $155,000.00 - $256,000.00 USD base salary; $138,100.00 - $227,900.00 USD base salary

Tools

CSAM, TDR, FIB, SEM, TEM, IR/EMMI/OBIRCH, SIL (Solid Immersion Lens), LSM (Laser Scanning Microscopy)

Model-written summary · the original posting is authoritative

First seen Oct 31, 2026 · Last verified Nov 5, 2026 (UTC)