Cisco
ASIC Packaging Signal/Power Integrity Hardware Engineer (Hybrid)
$138K–$256K
San Jose, California, US · Hybrid · Full-time · Posted Oct 8, 2026
- Experience
- Bachelor's degree: 4+ years of relevant signal and power integrity experience; Master's degree: 2+ years; PhD: 0+ years of related experience; or equivalent related work experience.
- Education
- Bachelor's, Master's, or PhD in Electrical Engineering, or equivalent related work experience.
About the job
Defines, designs, analyzes, and verifies ASIC packages for Cisco platforms, focusing on signal and power integrity across interposers, substrates, and PCBs.
What you'll do
- Develop and document design rules for ultra-high-speed signaling and meet product power, performance, and area goals.
- Analyze substrate signal and power integrity, collaborating with layout teams on solutions across interposer, substrate, and PCB.
- Design and document ASIC packages for release, including post-layout extraction and reporting; collaborate with partners and vendors to resolve technical issues.
What they ask for
- High-speed design experience involving transmission line theory, electromagnetics, scattering parameters, impedance analysis, and 56G PAM4 SerDes, channel modeling, and BER prediction.
- Experience with pre- and post-layout SI/PI simulations using EDA tools such as Cadence Sigrity, Ansys HFSS, and Keysight ADS.
- Experience with layout reviews and physical validation using tools such as Cadence APD and Ansys EM flows.
- Experience with SPICE for circuit-level analysis, signal modeling, and performance validation.
Nice to have
- Experience with HBM or high-speed memory interface SI; die-to-die interfaces (UCIe or proprietary); or advanced packaging such as CoWoS, EMIB, and interposer-based designs.
- Experience with Vector Network Analysis or IBIS; ability to communicate technical concepts to diverse audiences.
Pay
$155,000.00 to $222,600.00 USD (starting salary; excludes incentive compensation, equity, and benefits); $155,000.00 - $256,000.00 USD (full salary range, New York City Metro Area); $138,100.00 - $227,900.00 USD (full salary range, non-Metro New York state & Washington state)
Tools
Cadence Sigrity, Ansys HFSS, Keysight ADS, Cadence APD, Ansys EM, SPICE, UCIe, IBIS
Model-written summary · the original posting is authoritative