Cisco
ASIC Post silicon DFT Technical Leader
$178K–$356K
Austin, Texas, US +1 · Hybrid · Full-time · Posted Oct 13, 2026
- Location
- Austin, Texas, US
San Jose, California, US - Experience
- At least 12 years.
- Education
- Bachelor's or Master's degree in Electrical or Computer Engineering required.
About the job
Leads post-silicon DFT activities for networking ASICs, defining bring-up-to-production plans and driving DFT requirements, quality, and production processes.
What you'll do
- Collaborate with product engineering, reliability, board, package, functional test, and system teams on the post-silicon roadmap.
- Drive DFT requirements early in design and lead post-silicon processes through production.
- Support development of next-generation networking chips and improve production quality.
What they ask for
- Bachelor's or Master's degree in Electrical or Computer Engineering.
- Experience in post-silicon validation, hardware bring-up, yield and reliability learnings, ramp acceleration, failure analysis efficiency, and production scalability.
- Experience with DFT and post-silicon validation from initial bring-up through high-volume production.
- Experience with gate-level simulation and debugging using VCS or other simulators; post-silicon debug and ability to work with ATE patterns and P1687.
Nice to have
- Verilog design, custom DFT logic, IP integration, or functional verification.
- DFT CAD development, test static timing analysis.
Pay
$177,600.00 to $257,400.00 USD (base salary); $214,100.00 - $356,300.00 USD (base salary); $192,400.00 - $317,200.00 USD (base salary)
Tools
VCS, ATE patterns, P1687, Verilog
Model-written summary · the original posting is authoritative