Cisco
Design Verification Technical Leader
$192K–$356K
Carlsbad, California, US +1 · Hybrid · Full-time · Posted Oct 22, 2026
- Location
- Carlsbad, California, US
Allentown, Pennsylvania, US - Experience
- 8+ years with a Bachelor’s; 6+ years with a Master’s; or 3+ years with a PhD. Degree-specific experience is stated as ASIC Design Verification, except the Master’s alternative, which says ASIC Design experience.
- Education
- Bachelor’s or Master’s degree in Electrical or Computer Engineering, or PhD in Electrical Engineering or Computer Engineering.
About the job
Leads design verification for high-speed silicon photonics driver ICs and their integration into Cisco routing, switching, and data center platforms.
What you'll do
- Define verification methodology and standards across projects, and coordinate work across sites.
- Lead block- and chip-level verification, review specifications and designs, and guide architecture for testability and verification efficiency.
- Mentor verification engineers, debug silicon and system issues, and support post-silicon bring-up and integration performance.
What they ask for
- Bachelor’s in Electrical or Computer Engineering and 8+ years of ASIC Design Verification experience; or Master’s in Electrical or Computer Engineering and 6+ years of ASIC Design experience; or PhD in Electrical or Computer Engineering and 3+ years of ASIC Design Verification experience.
- Experience with System Verilog, UVM, and verification methodologies.
- Experience owning and delivering verification for large-scale SoCs or subsystems.
- Experience leading verification teams or projects, and with scripting and automation such as Python, Perl, TCL, or Shell Scripts.
Nice to have
- Verification experience with SerDes IP, D2D PHY IP, ODSP, integrated transceiver features, CPU subsystems, or protocols such as Ethernet, UCIE, UAL, and SPI/I2C.
- Experience with Formal Verification, emulation and prototyping platforms (Veloce, HAPS), or design-for-testability and verification.
Pay
USD $192,400.00 to $275,800.00 base salary; USD $214,100.00 - $356,300.00 base salary (New York City Metro Area); USD $192,400.00 - $317,200.00 base salary (non-metro New York state & Washington state)
Tools
System Verilog, UVM, Python, Perl, TCL, Shell Scripts, Verilog, Veloce
AI focus
Verifies silicon photonics driver ICs for optical transceivers and modules powering AI/ML workloads and next-generation data centers.
Model-written summary · the original posting is authoritative