Cisco
Senior Analog/mixed-signal IC Design Engineer - Acacia (Hybrid)
$179K–$329K
San Jose, California, US · Hybrid · Senior · Full-time · Posted Jul 26, 2026
- Experience
- 12+ years with BSEE, 8+ years with MS, or 5+ years with PhD; equivalent qualifications or experience are stated.
- Education
- BSEE, MS, or PhD; equivalent qualifications or experience are stated.
About the job
Architects, designs, measures, and productizes high-speed analog/mixed-signal CMOS ICs for optical communications products.
What you'll do
- Lead a large chip-design block, mentor team members, track deliverables, and contribute to peer reviews and design methodology.
- Design, lay out, simulate, and measure high-speed analog/mixed-signal circuits.
- Collaborate with packaging and hardware teams to meet signal- and power-integrity specifications.
What they ask for
- Design, simulation, and measurement experience in at least 3 listed high-speed IC areas.
- BSEE with 12+ years of experience, MS with 8+ years, or PhD with 5+ years; equivalent qualifications or experience are also stated.
Nice to have
- Electrical transceiver experience, including backplane and cable communications; FinFET experience.
- Experience with high-frequency or custom transistor layout, floorplanning, manufacturability, ESD practices, or mixed-signal simulations.
Pay
$194,600.00 to $285,700.00 (base salary); $194,600.00 - $328,600.00 (base salary); $179,000.00 - $294,000.00 (base salary)
Tools
CMOS, FinFET, Cadence (virtuoso), Spectre/APS/SpectreX, Matlab, EMX, AMS
Model-written summary · the original posting is authoritative