Efficient Computer
Applications Engineer - Silicon IP
$160K–$230K
San Fransisco, Bay Area OR Pittsburgh, PA OR Austin, TX +3 · Full-time · Posted Aug 27, 2026
- Location
- San Fransisco, Bay Area OR Pittsburgh, PA OR Austin, TX
Austin, TX
Pittsburgh, PA
San Francisco, California, United States - Experience
- 5+ years; experience may be in ASIC/SoC verification, physical design, silicon IP integration, or a closely related applications engineering role.
- Education
- BS or MS in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
About the job
Helps customers evaluate, integrate, verify, and physically implement Efficient Computer silicon IP in SoCs, resolving technical issues and guiding integrations through signoff.
What you'll do
- Serve as the technical point of contact for customer IP integrations, from RTL simulation and verification through physical implementation and signoff.
- Develop reference verification environments, implementation flows, integration collateral, and customer training; debug integration issues and recommend corrective actions.
- Share field feedback with internal teams, support technical evaluations, and help shape IP deliverables and roadmap priorities.
What they ask for
- BS or MS in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
- 5+ years of experience in ASIC/SoC verification, physical design, silicon IP integration, or a closely related applications engineering role.
- Strong scripting and automation skills using Python, TCL, Make, or shell; hands-on experience integrating silicon IP.
- Experience diagnosing complex integration issues and communicating actionable guidance; familiarity with multiple foundries or process nodes.
- Willingness to travel to customer sites approximately 20–30%, depending on business needs.
Nice to have
- Experience in IP vendor applications engineering, verification or physical-design consulting, or silicon IP integration at a systems/SoC company.
- Experience with formal verification, protocol compliance, verification IP, low-power design, SoC-level DFT, reliability signoff, processor-based SoCs, or public speaking and technical training.
Pay
$160,000 to $230,000 (base salary)
Tools
Python, TCL, Make, shell, SystemVerilog, UVM, Xcelium, VCS
AI focus
The role supports silicon IP integration for computing platforms that include AI applications; no direct AI development work is specified.
Model-written summary · the original posting is authoritative