Drimva

Efficient Computer

Hardware Technical Program Manager

$200K–$260K

San Francisco, Bay Area OR Pittsburgh, PA OR Austin, TX +3 · Manager · Full-time · Posted Aug 14, 2026

Location
San Francisco, Bay Area OR Pittsburgh, PA OR Austin, TX
Austin, TX
Pittsburgh, PA
San Francisco, California, United States
Experience
7+ years, including at least 2 full SoC/ASIC programs taken from concept through tapeout and silicon bring-up.
Education
B.S. in Electrical/Computer Engineering, Computer Science, or equivalent; M.S. or MBA a plus.

About the job

Own end-to-end semiconductor hardware programs from architecture freeze through tapeout, silicon bring-up, and production release, coordinating execution across engineering teams and external partners.

What you'll do

  • Build and manage program schedules, execution cadence, dependencies, risks, and decision tracking.
  • Coordinate design, verification, physical implementation, signoff, supply chain, and post-silicon activities through tapeout and production.
  • Manage foundry, OSAT, IP, and EDA partner deliverables; report program status and track resources and budgets.

What they ask for

  • B.S. in Electrical/Computer Engineering, Computer Science, or equivalent.
  • 7+ years in semiconductor/hardware engineering or program management, including at least 2 full SoC/ASIC programs from concept through tapeout and silicon bring-up.
  • Working fluency in chip design flow, including RTL, verification, DFT, synthesis, PnR, STA, physical signoff, GDSII handoff, and post-silicon validation.
  • Experience building and defending bottoms-up schedules; hands-on familiarity with Jira, Confluence, and MS Project/Smartsheet.

Nice to have

  • Prior hands-on engineering experience in design, DV, or physical design; advanced or FinFET node experience and direct foundry engagement (TSMC preferred).
  • Familiarity with AI/ML accelerators, emulation/FPGA prototyping, package/board co-design, or relevant quality and compliance frameworks.

Pay

$200,000 to $260,000 (base salary); 10% annual bonus (amount not specified)

Tools

RTL, Jira, Confluence, MS Project, Smartsheet, Synopsys, Cadence, Siemens EDA

AI focus

The role may support AI/ML accelerator programs; the posting does not specify direct AI development responsibilities.

Model-written summary · the original posting is authoritative

First seen Oct 29, 2026 · Last verified Nov 4, 2026 (UTC)