Drimva

Efficient Computer

Physical Design - CAD Lead

$180K–$260K

San Francisco, Bay Area OR Pittsburgh, PA OR Austin, TX +3 · Full-time · Posted Feb 20, 2026

Location
San Francisco, Bay Area OR Pittsburgh, PA OR Austin, TX
Austin, TX
Pittsburgh, PA
San Francisco, California, United States
Experience
5+ years of industry experience with a Master's degree, or 3+ years with a PhD.
Education
Master's or PhD in Electrical Engineering.

About the job

Build and maintain physical design CAD flows and infrastructure to support efficient, repeatable chip development and signoff across multiple product lines.

What you'll do

  • Develop physical design flows, methodology, and infrastructure, including regression frameworks and collateral-quality tools.
  • Partner with physical design leads on end-to-end build and signoff flows and improve flow consistency and efficiency.
  • Coordinate third-party vendor work and deploy a unified environment for design collateral and flow dependencies.

What they ask for

  • Master's degree in Electrical Engineering with 5+ years of industry experience, or PhD in Electrical Engineering with 3+ years of industry experience.
  • Strong scripting skills in TCL, shell, and Python.
  • Experience developing workflow orchestration infrastructure or tools for hardware development and implementing regression frameworks.
  • Familiarity with Kubernetes and containerization; SQL or other database proficiency; intimate knowledge of Physical Design and RTL/DV workflows.

Nice to have

  • Experience in full-chip RTL/DV and physical design flows, or hands-on CAD flow infrastructure development.
  • Knowledge of circuit design, device physics, deep sub-micron and SOI technology; experience with timing constraints, analog/mixed-signal integration, or IP collateral verification.

Pay

$180,000 to $260,000 USD base salary

Tools

Cadence Tempus, Synopsys Primetime, Python, Airflow, flowtracer, Kubernetes, TCL, MongoDB

Model-written summary · the original posting is authoritative

First seen Oct 29, 2026 · Last verified Nov 5, 2026 (UTC)