Eliyan
Architecture - I/O Architect
Bay Area · On-site · Full-time · Posted Sep 29, 2025
- Experience
- 8+ years; ideal qualification: 15+ years of ASIC architecture experience.
- Education
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
About the job
Architect and develop NuLink PHY I/O and protocol subsystems for chiplet-based ASICs, overseeing design, validation, customer integration, and delivery methodologies.
What you'll do
- Define PHY subsystems, protocol bridges, and firmware-first hardware architecture; design protocol conversion across connectivity domains.
- Model and optimize performance, review validation plans, and ensure protocol compliance and interoperability.
- Collaborate with ASIC, firmware, post-silicon, customer, and marketing teams; write architecture specifications and mentor engineers.
What they ask for
- Expertise in multiple areas of architecture definition, chip micro-architecture, and protocol definition and implementation.
- Strong knowledge of at least two of PCIe, UCIe, UALink, Ethernet, DDR, and AMBA.
- Strong scripting and automation skills.
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
Nice to have
- Performance modeling with C, C++, or SystemC; PHY clocking and floorplan knowledge.
- RTL-to-GDSII flow expertise and a record of leading teams through successful tapeouts.
Tools
PCIe, UCIe, UALink, Ethernet, DDR, AMBA AXI/APB, CXL, SystemC
Model-written summary · the original posting is authoritative