Drimva

Eliyan

DFT Implementation Lead

Bay Area · On-site · Full-time · Posted Nov 24, 2024

Experience
At least 15 years of experience in hardware DFT, testability, and physical design.
Education
Bachelor's or Master's degree in Electrical or Computer Engineering.

About the job

Leads DFT architecture and implementation for PHYs, controllers, and 2.5D/3DIC chiplet products, including test access, screening, validation, and customer collateral.

What you'll do

  • Develop DFT IP and features for test, debug, and diagnostics, and integrate them with design and implementation teams.
  • Own DFT architecture, tool selection, constraints, sign-off, and Known-Good-Die test strategies for multi-die products.
  • Deliver DFT documentation, coverage dashboards, patterns, and integration collateral for customers and Test Engineering.

What they ask for

  • Bachelor's or Master's degree in Electrical or Computer Engineering.
  • At least 15 years of experience in hardware DFT, testability, and physical design.
  • Expertise in JTAG protocols, scan and BIST architectures, memory BIST, and boundary scan.
  • Hands-on 2.5D/3DIC and chiplet DFT experience, including multi-die test access and die-to-die interface testing.

Tools

Tessent, TetraMax, Genus, Tempus, DC, PrimeTime, Tcl, Python

Model-written summary · the original posting is authoritative

First seen Oct 29, 2026 · Last verified Nov 4, 2026 (UTC)