Eliyan
Digital - Digital Design Engineer (title will reflect experience)
Bay Area, Vancouver or Toronto · On-site · Full-time · Posted Dec 18, 2025
- Experience
- 5+ years of experience in high-speed digital design; preference for retimer, gearbox, or Ethernet PMA/PCS logic.
- Education
- Bachelor’s, Master’s, or Ph.D. in Electrical Engineering and related fields, or equivalent.
About the job
Develop and integrate high-speed Ethernet PCS/PMA IPs, defining micro-architecture and implementing RTL optimized for power, area, and performance.
What you'll do
- Design and integrate Ethernet PCS/PMA IPs for 100/200/400/800G; develop micro-architecture specifications and SystemVerilog designs.
- Ensure IEEE 802.3 compliance and collaborate with verification and physical design teams to validate and implement designs.
- Maintain IP design collateral, including documentation, RTL, SDC constraints, power intent definitions, and LINT/CDC files.
What they ask for
- Bachelor’s, Master’s, or Ph.D. in Electrical Engineering or related fields, or equivalent.
- 5+ years of experience in high-speed digital design.
- Strong expertise in RTL and assertion coding with SystemVerilog; proficiency taking RTL through synthesis and producing a PPA-optimized frontend netlist.
- Knowledge of Ethernet 802.3 standards related to 100G/200G/400G/800G, Auto-Negotiation, and Link Training.
Nice to have
- Experience integrating third-party mixed-signal IPs.
- Knowledge of DRAM Controllers/PHYs and HBM Memory.
Tools
SystemVerilog, Ethernet PCS/PMA, IEEE 802.3, SDC, UPF/CPF, LINT/CDC
Model-written summary · the original posting is authoritative