Etched
Advanced Packaging SI/PI Engineer
$150K–$400K
San Jose · On-site · Full-time · Posted Aug 27, 2026
- Experience
- 8+ years of SI/PI experience.
- Education
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
About the job
Own signal and power integrity across AI accelerator silicon, advanced packages, boards, and rack-scale systems, working with internal teams and manufacturing partners to optimize electrical performance.
What you'll do
- Analyze and optimize SI/PI for 2D/2.5D/3D packages, including high-speed routing and PDN design.
- Drive interposer and substrate requirements, rail impedance and IR-drop targets, and ball map/C4/BGA pin assignments through design freeze.
- Support board- and rack-level SI/PI studies, test vehicle design, cable characterization, and cross-functional design reviews.
What they ask for
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
- 8+ years of SI/PI experience on high-performance ASIC, processor, or accelerator platforms.
- Experience defining and closing PDNs for high-power silicon and developing systems with HBM, SerDes, and D2D interfaces.
- Hands-on expertise with one or more of ANSYS HFSS / SIwave, Cadence Sigrity (PowerSI / PowerDC), or Keysight ADS; experience with CoWoS or equivalent advanced packaging.
Nice to have
- Familiarity with RTL-to-GDSII and multi-die, 2.5D, or 3D packaging signoff, including CPS co-design.
- Project management experience with internal teams, OSAT partners, and PCB ODMs; familiarity with ML/LLM architectures, accelerators, or HPC.
Pay
USD 150K – USD 400K base salary
Tools
ANSYS HFSS / SIwave, Cadence Sigrity (PowerSI / PowerDC), Keysight ADS, HBM, SerDes, D2D
Model-written summary · the original posting is authoritative