Etched
Design Verification Engineer - Interface IP
$150K–$350K
San Jose · On-site · Full-time · Posted Sep 11, 2025
- Experience
- 5+ years of design verification experience
About the job
Own verification of interface IP subsystems and validate their correctness, performance, and integration across the hardware-software stack.
What you'll do
- Own one or more IP subsystems, such as PCIe, Ethernet, CPU, low-power peripherals, or sensors; understand vendor configurations and coordinate with internal IP teams.
- Develop and maintain UVM/SystemVerilog verification environments and collaborate with integration and SoC DV teams.
- Drive coverage closure and sign-off by setting metrics, analyzing gaps, and verifying corner cases and stress scenarios.
What they ask for
- Hands-on experience with SystemVerilog/UVM and scalable, reusable testbench development.
- Familiarity with standard IP interfaces and protocols such as PCIe, Ethernet, AXI/AMBA, or ARM/ARC CPUs.
- Ability to take ownership with minimal direction and collaborate across technical teams.
Nice to have
- Experience handling vendors and integrating IP/VIP.
Pay
$150K – $350K (base salary)
Tools
UVM, SystemVerilog, PCIe, Ethernet, AXI/AMBA, ARM/ARC
Model-written summary · the original posting is authoritative