Etched
Design Verification Engineer - SoC
$150K–$350K
Austin · On-site · Full-time · Posted Apr 16, 2026
About the job
Verifies and tunes the performance of chip subsystems across the ASIC lifecycle, correlating hardware behavior with architectural models and software workloads.
What you'll do
- Verify performance features and correlate pre- and post-silicon results with performance models.
- Build test plans, test infrastructure, tests, checkers, and coverage monitors for performance verification.
- Analyze bottlenecks and tune performance across hardware, software, and silicon.
What they ask for
- Strong understanding of digital design, RTL, and ASIC design flows.
- Hands-on experience with performance verification, simulation, and modeling.
- Comfort developing SystemVerilog checkers, coverage monitors, and testbenches.
- Skill writing Python scripts for automation, data analysis, and performance modeling.
Nice to have
- Understanding of memory hierarchies, pipelines, interconnects, and compute accelerators.
- Familiarity with performance bottleneck analysis, compiler optimizations, workload tuning, or kernel-level profiling.
Pay
USD $150K – $350K base salary
Tools
SystemVerilog, Python
AI focus
The role verifies performance of inference-focused chip hardware, including systolic arrays, DMA engines, and NoCs.
Model-written summary · the original posting is authoritative