Etched
Emulation Engineer, Hardware Prototyping (HAPS)
$150K–$350K
San Jose · On-site · Full-time · Posted Jun 1, 2026
About the job
Bring up and scale HAPS hardware prototypes by partitioning and debugging RTL, enabling interfaces, supporting software users, and automating prototyping flows.
What you'll do
- Bring up HAPS prototypes, including partitioning, timing closure, clocking, memory mapping, and full-chip assembly.
- Support firmware, driver, and software engineers by triaging failures and debugging issues across FPGA boundaries.
- Build and automate platform configurations, interface models, regressions, and image-delivery flows.
What they ask for
- Hands-on FPGA prototyping experience covering partitioning, synthesis, timing closure, bring-up, and debug.
- Strong SystemVerilog and Verilog skills, including understanding FPGA synthesis suitability.
- Solid C/C++ and Linux system development.
- Scripting fluency in Python, TCL, or shell.
Nice to have
- Experience with ProtoCompiler, Vivado, Synopsys prototyping flows, or emulation platforms such as ZeBu, Palladium, or Veloce.
- Firmware, driver, or bootloader bring-up; UVM, DFT, testbench modeling, waveform debug, SLURM, or CI experience.
Pay
$150,000 - $275,000 (base salary); $150K – $350K (compensation; pay type not specified)
Tools
HAPS, SystemVerilog, Verilog, C/C++, Linux, Python, TCL, Synopsys
AI focus
Contributes to hardware prototyping for Etched’s inference-focused AI systems.
Model-written summary · the original posting is authoritative