Drimva

Etched

Power Validation Engineer

San Jose · On-site · Full-time · Posted Apr 30, 2026

Experience
Relevant experience with silicon bring-ups; no years specified.
Education
Bachelor’s degree in Electrical Engineering or a related field.

About the job

Own end-to-end power characterization and qualification of an ASIC and mezzanine-card platform, using measurements and automated testing to inform silicon, package, PCB, and system design.

What you'll do

  • Design and execute power measurement campaigns, validate power delivery and thermal behavior, and characterize transient events under representative workloads.
  • Develop automated tests, conduct stress testing and failure analysis, and own power-related qualification criteria and reporting.
  • Collaborate with hardware, RTL, physical design, firmware, and diagnostics teams to debug issues and translate test results into design changes.

What they ask for

  • Bachelor’s degree in Electrical Engineering or a related field.
  • Deep understanding of ASIC and system-level power delivery, with hands-on bench experience using precision shunts, isolated differential probes, and VNA-based PDN impedance measurement.
  • Expertise with multi-phase solutions with high dynamic content and low tolerance; experience with VR tuning to a defined power test plan.
  • Demonstrated experiment design, oscilloscope and lab instrument fluency, and relevant experience with silicon bring-ups.

Nice to have

  • Master’s degree in Power Electronics; experience with high-voltage testing (800V and higher).
  • Power validation on AI accelerators, GPUs, or high-performance server platforms; experience with OpenBMC, IPMI, BMC firmware, LLM inference stacks, or Python automation.

Pay

$500 per month (benefit credit); $2,500 per month (housing subsidy)

Tools

ASIC, VRM, PDN, VNA, PMBus, OpenBMC, IPMI, Python

AI focus

Characterize ASIC and system power under LLM inference workloads, including automated workload sweeps across model sizes, batch sizes, sequence lengths, and precision modes.

Model-written summary · the original posting is authoritative

First seen Oct 10, 2026 · Last verified Nov 4, 2026 (UTC)