Drimva

Etched

RTL Design Engineer

$150K–$370K

San Jose · On-site · Full-time · Posted Jun 11, 2025

Experience
At least 5 years of work experience in RTL development.

About the job

Develop RTL for AI ASICs, including implementing logic blocks and supporting design verification while coordinating with the microarchitecture team on timing and area constraints.

What you'll do

  • Implement RTL blocks, including floating-point math operators.
  • Develop and implement design verification strategies for ASIC designs.
  • Provide feedback to the microarchitecture team to help meet timing and area constraints.

What they ask for

  • At least 5 years of work experience in RTL development.
  • Experience with high-speed digital logic.
  • Proficiency in standard RTL design and synthesis tools.
  • Familiarity with verification work and writing test benches.

Nice to have

  • Experience with PCIe, Ethernet, or HBM technologies.
  • Familiarity with modern ML and LLM model architectures, numerical representations and functions, or Python or another scripting language.

Pay

$150K – $370K USD base salary

Tools

RTL, ASIC, PCIe, Ethernet, HBM, Python

AI focus

Work on AI inference chips and learn about transformers and other aspects of modern artificial intelligence.

Model-written summary · the original posting is authoritative

First seen Oct 10, 2026 · Last verified Nov 5, 2026 (UTC)