Senior Silicon Design Verification Engineer, YouTube Video Accelerators
Mountain View, CA, USA · Senior · Full-time · Posted Sep 24, 2026
- Experience
- 8 years of experience with Design Verification.
- Education
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
About the job
Verify YouTube video codec ASICs from HLS C/C++ code through generated RTL, ensuring functional correctness and hardware equivalence.
What you'll do
- Lead verification strategy and signoff across HLS code and generated RTL, including coverage closure.
- Build and maintain C/C++ GoogleTest and SystemVerilog/UVM verification environments; use co-simulation, formal equivalence, and transaction-level modeling.
- Debug issues across C++ and RTL, partner with design teams to improve verifiability, and mentor junior engineers.
What they ask for
- Experience with SystemVerilog and Universal Verification Methodology (UVM).
Nice to have
- Practical experience with HLS tools and strong C/C++ skills.
- Expertise in video processing, image pipelines, or video compression standards such as AV1, AV2, or H.264.
Pay
$163000 - $236000 USD base salary
Tools
C/C++, GoogleTest, SystemVerilog, UVM, Catapult, Vivado, XLS, VCS
Model-written summary · the original posting is authoritative