Drimva

Google

Senior Test Engineer, CMOS Backplane, Raxium

Fremont, CA, USA · Senior · Full-time · Posted Oct 6, 2026

Experience
4 years in Silicon, CMOS, and IC test development; 3 years in Silicon test hardware, software debugging, and data analysis in R&D or manufacturing.
Education
Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, Physics, or a specialized field (e.g., Optics, Sensors, Audio/DSP), or equivalent practical experience.

About the job

Develop and optimize test solutions for CMOS backplanes and microLED display panels, supporting wafer-level testing, characterization, manufacturing, and R&D.

What you'll do

  • Develop, validate, and optimize CMOS backplane test solutions, including CMOS control software and test platforms.
  • Use probe cards, test equipment, and instrumentation to test and characterize CMOS/Silicon; diagnose electrical issues during wafer-level testing.
  • Collaborate on automated, high-speed testing and manufacturing process plans; improve test coverage, cost, and reliability test frameworks.

What they ask for

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, Physics, a specialized field, or equivalent practical experience.
  • 4 years of experience with Silicon, CMOS, and IC test development.
  • 3 years of experience with Silicon test hardware, software debugging, and data analysis in an R&D or manufacturing environment.

Nice to have

  • Master's degree or PhD in a related field.
  • Experience or familiarity with testing software development, Python, SQL databases, Linux/Ubuntu, test instruments, firmware, C/C++, I2C, SPI, SRAM test patterns, and display technologies.

Pay

$159000 - $230000 (USD) base salary

Tools

Python, SQL, Linux, Ubuntu, C/C++, I2C, SPI, CMOS

Model-written summary · the original posting is authoritative

First seen Oct 21, 2026 · Last verified Nov 5, 2026 (UTC)