Drimva

Google

Silicon Validation Engineer, HBM, Google Cloud

Sunnyvale, CA, USA · Full-time · Posted Oct 5, 2026

Experience
2 years; the posting lists alternatives for the type of ASIC validation or debugging experience.
Education
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.

About the job

Validates Google TPU High Bandwidth Memory (HBM) subsystems by developing and running silicon tests, characterizing operation, and debugging issues across test chips and production silicon.

What you'll do

  • Develop silicon test plans with cross-functional architecture, design, software, and firmware teams.
  • Develop software tests and validation flows; test hardware, collect data, and characterize HBM operation.
  • Triage and debug issues during new product development and identify solutions.

What they ask for

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
  • 2 years of experience bringing up ASICs, performing functional and performance validation, or debugging failures.
  • Experience scripting in Python or a similar programming language.

Nice to have

  • Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science, with an emphasis on computer architecture, or a related field.
  • Experience with C++/Python software design principles, high-power ASIC bring-up and memories, SystemVerilog and chip design flow, or test automation tools and scripts; passion for unusual computer architectures.

Pay

USD 138000 - 197000 base salary; + 15% bonus target + equity + benefits (amounts not specified)

Tools

TPU, HBM, ASIC, Python, C++, SystemVerilog

AI focus

Validates HBM hardware for TPUs that power AI/ML applications; no AI model development is stated.

Model-written summary · the original posting is authoritative

First seen Oct 8, 2026 · Last verified Nov 4, 2026 (UTC)