Staff CPU RTL Engineer, Silicon
Austin, TX, USA +2 · Staff · Full-time · Posted Oct 13, 2026
- Location
- Austin, TX, USA
Portland, OR, USA
Mountain View, CA, USA - Experience
- 8 years.
- Education
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
About the job
Develop CPU subsystem microarchitecture and RTL designs for next-generation CPUs, coordinating with partner teams to meet performance, power, and area goals.
What you'll do
- Develop CPU subsystem front-end designs, including microarchitecture and RTL.
- Propose and evaluate performance-enhancing microarchitecture features with Software, Architect, and Performance teams.
- Deliver production-quality designs and work with Verification, physical design, and power teams to meet PPA goals.
What they ask for
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 8 years of experience in CPU or AI accelerator logic/RTL design, including microarchitecture definition and PPA optimizations.
- Experience with RTL language (System Verilog) and related design processes (e.g., Lint, UPF).
Nice to have
- Master's degree or PhD in a relevant field, emphasizing computer architecture.
- Experience leading front-end design for modern processor components or AI accelerators; ARM Instruction Set Architecture; or SOC design, architect, and integration.
Pay
$192000 - $278000 (USD) base salary
Tools
System Verilog, Lint, UPF, ARM Instruction Set Architecture
AI focus
The role includes CPU subsystem design and may involve AI accelerator logic/RTL design; the posting does not specify other AI work.
Model-written summary · the original posting is authoritative