HPE
Principal Signal Integrity Engineer
$181K–$367K
Sunnyvale, California, United States of America · Principal · Full-time · Posted Oct 21, 2026
- Experience
- Typically 10+ years with a bachelor's degree, or 8+ years with a master's degree, in signal integrity analysis.
- Education
- Bachelor's or master's degree in Electrical engineering, Computer engineering, Microwave, and/or RF engineering.
About the job
Performs signal and power integrity analysis for high-speed networking products, including ASIC PAM4 SerDes channel modeling, simulation, measurement, and design optimization.
What you'll do
- Analyze channel margins and develop ASIC PAM4 SerDes simulation models, correlating them with measurements and test structures.
- Perform PCB timing analysis, develop SI layout rules and checklists, and collaborate with board engineers and layout designers.
- Conduct SI design verification measurements and SerDes tuning, correlate measurements with simulations, and assess project performance.
What they ask for
- Experience with 56G/112G ASIC PAM4 SerDes technologies.
- Hands-on serial-channel experience up to 200G line rates, including coefficient tuning and TP1A measurements.
- Typically 10+ years of signal integrity analysis experience with a bachelor's degree in a specified engineering field, or 8+ years with a master's degree in a specified engineering field.
Nice to have
- 200G ASIC PAM4 experience.
- Proficiency with CAD tools such as Ansys HFSS, SIwave ADS, Allegro, Sigrity, and MATLAB; lab-equipment experience is also valued.
Pay
USD 181,000 - 367,000 (base salary)
Tools
ASIC PAM4 SerDes, COM, Ansys HFSS, SIwave ADS, Allegro, Sigrity, MATLAB, Vector Network Analyzers
Model-written summary · the original posting is authoritative