HPE
Principal Signal Integrity Engineer
$181K–$367K
Sunnyvale, California, United States of America · Principal · Full-time · Posted Oct 26, 2026
- Experience
- Typically 10+ years with a bachelor’s degree or 8+ years with a master’s degree in signal integrity analysis.
- Education
- Bachelor’s or master’s degree in Electrical Engineering, Computer Engineering, Microwave, and/or RF Engineering.
About the job
Performs signal and power integrity analysis for high-speed networking products, including ASIC PAM4 SerDes channel modeling, simulation, measurements, and design optimization.
What you'll do
- Analyze channel margins and develop ASIC PAM4 SerDes simulation models; correlate models and simulations with measurements.
- Perform PCB timing analysis and DVT measurements, and develop and document SI design rules and checklists.
- Tune ASIC PAM4 SerDes parameters to improve serial-link margins and provide technical project assessments.
What they ask for
- Experience with 56G/112G ASIC PAM4 SerDes technologies.
- Hands-on experience with serial channels up to 200G line rates for coefficient tuning and TP1A measurements.
- Bachelor’s degree in Electrical Engineering, Computer Engineering, Microwave, and/or RF Engineering with typically 10+ years of signal integrity analysis experience, or a master’s degree in those fields with typically 8+ years.
Nice to have
- 200G ASIC PAM4 experience.
- Proficiency with CAD tools such as Ansys HFSS, SIwave, ADS, Allegro, Sigrity, and MATLAB; lab equipment experience is also noted.
Pay
USD 181,000 - 367,000 (base salary, annual; California)
Tools
ASIC PAM4 SerDes, Ansys HFSS, SIwave, ADS, Allegro, Sigrity, MATLAB, oscilloscopes
Model-written summary · the original posting is authoritative