HPE
Principal Signal Integrity Engineer
$181K–$367K
Sunnyvale, California, United States of America · Principal · Full-time · Posted Oct 21, 2026
- Experience
- 10+ years with a Bachelor’s degree, or 8+ years with a Master’s degree.
- Education
- Bachelor’s or Master’s degree in Electrical engineering, Computer engineering, Microwave, and/or RF engineering.
About the job
Performs signal and power integrity analysis for high-speed networking products, focusing on ASIC PAM4 SerDes channels, PCB design, and validation measurements.
What you'll do
- Analyze channel margins and develop and correlate ASIC PAM4 SerDes simulation models with measurements.
- Perform PCB timing analysis, establish SI layout rules, and collaborate with board engineers and layout designers.
- Conduct SI DVT measurements, tune SerDes parameters, and assess project performance for SI management.
What they ask for
- Experience with 56G/112G ASIC PAM4 SerDes technologies.
- Hands-on experience with serial channels up to 200G line rates, including coefficient tuning and TP1A measurements.
- 10+ years of Signal Integrity analysis experience with a Bachelor’s degree, or 8+ years with a Master’s degree, in a listed engineering field.
Nice to have
- 200G ASIC PAM4 experience.
- Proficiency with CAD tools such as Ansys HFSS, SIwave ADS, Allegro, Sigrity and MATLAB.
Pay
USD 181,000 - 367,000 (base salary)
Tools
ASIC PAM4 SerDes, Ansys HFSS, SIwave ADS, Allegro, Sigrity, MATLAB, oscilloscopes, Vector Network Analyzers
Model-written summary · the original posting is authoritative