HPE
Senior ASIC Design Verification Engineer - Slingshot
$140K–$321K
Chippewa Falls, Wisconsin, United States of America +2 · Senior · Full-time · Posted Oct 20, 2026
- Location
- Chippewa Falls, Wisconsin, United States of America
Ft. Collins, Colorado, United States of America
Bloomington, Minnesota, United States of America - Experience
- 10+ years in VLSI design, verification, or implementation.
- Education
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent.
About the job
Leads pre-silicon verification for HPE Slingshot switch and NIC ASICs, defining verification direction and improving workflows with automation and AI-assisted tools.
What you'll do
- Define verification methodology and develop SystemVerilog/UVM testbenches, scoreboards, checkers, and functional coverage.
- Triage regression failures, identify logic bugs, and drive bug closure and sign-off.
- Mentor engineers and apply scripting, automation, and AI-assisted or agentic tools to improve verification.
What they ask for
- 10+ years of experience in VLSI design, verification, or implementation.
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent.
- Expert-level knowledge of SystemVerilog and OVM or UVM methodologies.
- Expert-level knowledge of programming and scripting languages, hardware description languages, EDA, and/or FPGA tools.
Nice to have
- Experience verifying high-speed networking, switching, or NIC ASICs.
- Experience with agentic AI coding tools and workflows applied to verification.
Pay
USD 147,000 - 279,000 base salary (Colorado); USD 140,000 - 321,000 base salary (Minnesota & Wisconsin)
Tools
SystemVerilog, OVM, UVM, Python, Perl, Tcl, Linux
AI focus
Apply AI-assisted and agentic tools and workflows to improve verification speed and quality.
Model-written summary · the original posting is authoritative