HPE
Senior ASIC Design Verification Engineer - Slingshot
$140K–$321K
Chippewa Falls, Wisconsin, United States of America +2 · Senior · Full-time · Posted Oct 29, 2026
- Location
- Chippewa Falls, Wisconsin, United States of America
Ft. Collins, Colorado, United States of America
Bloomington, Minnesota, United States of America - Experience
- 10+ years in VLSI design, verification, or implementation.
- Education
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent.
About the job
Owns pre-silicon verification for future Slingshot switch and NIC ASICs, shaping verification methods and using automation and AI-assisted workflows.
What you'll do
- Develop test plans, SystemVerilog/UVM testbenches, scoreboards, checkers, and functional coverage; drive coverage closure and sign-off.
- Triage regression failures, identify logic bugs, and drive bug closure.
- Help define verification methodology, apply scripting and AI-assisted tools, and mentor less experienced engineers.
What they ask for
- Expert knowledge of SystemVerilog and OVM or UVM methodologies.
- Expert knowledge of programming and scripting languages, hardware description languages, EDA, and/or FPGA tools.
- Expert analytical and problem-solving skills; ability to work in distributed teams.
- Executive-level written and verbal communication skills and mastery in English.
Nice to have
- Experience verifying high-speed networking, switching, or NIC ASICs; experience with agentic AI coding tools and workflows.
- Experience with Python, Perl, Tcl, or another scripting language in Linux development environments.
Pay
USD 147,000 - 279,000 in Colorado (base salary); USD 140,000 - 321,000 in Minnesota & Wisconsin (base salary)
Tools
SystemVerilog, OVM, UVM, EDA, FPGA, Python, Perl, Tcl
AI focus
Apply AI-assisted and agentic tools and workflows to improve verification speed and quality.
Model-written summary · the original posting is authoritative