HPE
Senior ASIC verification engineer
$158K–$321K
Roseville, California, United States of America · Senior · Full-time · Posted Oct 9, 2026
- Experience
- 10+ years of experience in VLSI design, verification, or implementation.
- Education
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or equivalent.
About the job
Leads VLSI design verification and development for complex products, platforms, and prototypes, providing technical direction and mentoring to project teams.
What you'll do
- Lead VLSI design, validation, and testing teams; develop reliable, cost-effective, high-quality solutions.
- Review designs and project work for compliance with VLSI guidelines and standards, and provide feedback to improve quality.
- Provide architecture leadership, integrate new technologies, and mentor less experienced staff.
What they ask for
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or equivalent.
- 10+ years of experience in VLSI design, verification, or implementation.
- Experience with scripting languages (Python, PERL, TCL or equivalent), programming languages (C; C++), and Verilog/System Verilog.
- Proficiency in UVM methodologies.
Nice to have
- Specman knowledge is a plus.
Pay
USD 158,500 - 321,000 base salary
Tools
Python, PERL, TCL, C, C++, Verilog, System Verilog, UVM
Model-written summary · the original posting is authoritative